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HPL1117
1A Low Dropout Fast Response Positive Adjustable Regulator and Fixed 1.8V, 2.5V, 2.85V, 3.3V and 5V
Features
* * * * * * * * * *
Guaranteed Output Voltage Accuracy within 2% Fast Transient Response Guaranteed Dropout Voltage at Multiple Currents Load Regulation : 0.1% Typ. Line Regulation : 0.03% Typ. Low Dropout Voltage : 1.1V Typ. at IOUT =1A Current Limit : 1A Typ. at TJ=25C On-Chip Thermal Limiting : 150C Typ. Adjustable Output : 1.25~10.7V Standard 3-pin TO-220, TO-252, TO-263 and SOT-223 Power Packages
General Description
The HPL1117 is a low dropout three-terminal adjustable regulators with 1A output current capability. In order to obtain lower dropout voltage and faster transient response, which is critical for low voltage applications , the HPL1117 has been optimized. The device is available in an adjustable version and fixed output voltages of 1.8V, 2.5V, 2.85V, 3.3V and 5V. The output available voltage range of an adjustable version is from 1.25~10.7V with an input supply below 12V. Dropout voltage is guaranteed at a maximum of 1.3V at 1A. Current limit is trimmed to ensure specified output current and controlled short-circuit current. On-chip thermal limiting provides protection against any combination of overload that would create excessive junction temperatures. The HPL1117 is available in the industry standard 3-pin TO-220, TO252, TO-263, and the low profile surface mount SOT223 power packages which can be used in applications where space is limited.
Applications
* * *
Active SCSI Terminators Low Voltage Logic Supplies Post Regulator for Switching Power Supply
Pin Description
Front View for TO-220
3 2 1 VIN VOUT ADJ/GND
Front View for TO-263
3 TAB is VOUT 2 1 VIN VOUT ADJ/GND
Front View for TO-252
3 TAB IS VOUT 2 1
VIN VOUT ADJ/GND
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Pin Description (Cont.)
Front View for SOT-223
3 T A B IS V O U T 2 1 IN OUT A D J /G N D
Ordering and Marking Information
HPL1117Lead Free Code Handling Code Temp. Range Package Code Voltage Code Package Code F : TO-220 G : TO-263 U : TO-252 V : SOT-223 Temp. Range C : 0 to 70 C Handling Code TU : Tube TR : Tape & Reel Voltage Code 18 : 1.8V 25 : 2.5V 28 : 2.85V 33 : 3.3V 50 : 5V Blank : Adjustable Version Lead Free Code L : Lead Free Device Blank : Orginal Device HPL1117 XXXXX
HPL1117 F/G/U :
HPL1117 XXXXX
XXXXX - Date Code
HPL1117 V :
XXXXX - Date Code
18 HPL1117-18F/G/U : HPL1117 XXXXX 25 HPL1117-25F/G/U : HPL1117 XXXXX 28 HPL1117-28F/G/U : HPL1117 XXXXX 33 HPL1117 -33F/G/U : HPL1117 XXXXX 50 HPL1117 -50F/G/U : HPL1117 XXXXX
XXXXX - Date Code
HPL1117-18V :
HPL1117 XXXXX18
XXXXX - Date Code
XXXXX - Date Code
HPL1117-25V :
HPL1117 XXXXX25
XXXXX - Date Code
XXXXX - Date Code
HPL1117-28V :
HPL1117 XXXXX28
XXXXX - Date Code
XXXXX - Date Code
HPL1117-33V :
HPL1117 XXXXX33
XXXXX - Date Code
XXXXX - Date Code
HPL1117-50V :
HPL1117 XXXXX50
XXXXX - Date Code
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Absolute Maximum Ratings
Symbol VI TJ Input Voltage Parameter HPL1117, HPL1117-50, HPL1117-33 HPL1117-25, HPL1117-18, HPL1117-28 Operating Junction Temperature Range Control Section Power Transistor Storage Temperature Range Lead Temperature (Soldering, 10 second) Rating 15 9 0 to 125 0 to 150 -65 to +150 260
(Note)
Unit V C
TSTG TL
C C
Note : The values here show the absolute maximum rating, and for normal usage please refer the test condition in Electrical Characteristics Table.
Electrical Characteristics
Unless otherwise noted , these specifications apply over CIN=10uF , COUT=10uF , and TJ=0 to 125C. Typical values refer to TJ=25C. Symbol Parameter Test Conditions HPL1117 Unit Min. Typ. Max. VREF Reference Voltage 10mA IOUT 1A, 1.4V(VIN -VOUT) 10.75V, V 1.225 1.250 1.275 TJ =0~125C
VOUT Output Voltage HPL1117-18 TJ =0~125C, 0 IOUT 1A, 3.1VVIN9V, HPL1117-25 TJ =0~125C, 0 IOUT 1A, 3.8VVIN9V, HPL1117-28 TJ =0~125C, 0 IOUT1A, 4.25VVIN9V, HPL1117-33 TJ =0~125C, 0 IOUT 1A, 4.6VVIN12V, HPL1117-50 TJ =0~125C, 0 IOUT 1A, 6.45VVIN12V, Line Regulation HPL1117 IOUT=10mA, 1.5V(VIN -VOUT )10.75V (Note1) HPL1117-18 IOUT=0A, 3.5VVIN9V (Note1) HPL1117-25 IOUT=0A, 4VVIN9V (Note1) HPL1117-28 IOUT=0A, 4.25VVIN 9V (Note1) HPL1117-33 IOUT=0A, 4.75VVIN 12V (Note1) HPL1117-50 I =0A, 6.45VV 12V (Note1) OUT IN Load Regulation HPL1117 (VIN -VOUT)=3V, 0 IOUT 1A (Note1) HPL1117-18 VIN=3.5V, 0 IOUT 1A (Note1) HPL1117-25 VIN =4V, 0 IOUT 1A (Note1) HPL1117-28 VIN=4.25V, 0 IOUT 1A (Note1) HPL1117-33 VIN=4.75V, 0 IOUT 1A (Note1) HPL1117-50 V =6.45V, 0 I 1A (Note1) IN OUT
3
1.764 1.800 1.836 2.450 2.500 2.550 2.790 2.850 2.910 3.235 3.300 3.365 4.900 5.000 5.100 0.03 1 1 1 1 1 0.1 1 1 1 1 1 0.2 6 6 6 6 6 0.4 10 10 10 10 10 V
REGLINE
%mV
REGLOAD
%mV
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Electrical Characteristics (Cont.)
Symbol VD Parameter Dropout Voltage Test Conditions IOUT=100mA (Note2) IOUT=500mA (Note2) IOUT=1A (VIN -VOUT)=5V, TJ=25C (VIN -VOUT)=3V, IOUT=10mA
(Note2)
ILIMIT IADJ IADJ IO PSRR TR TS LS VN th OT IQ
Current Limit
HPL1117 Min. Typ. 1 1.05 1.1 1000 60 0.2 1.7 60 75 0.01 0.5 0.3 0.003 15 50 150
Max. 1.1 1.2 1.3 120 5
Unit V mA A A mA dB
Adjust Pin Current HPL1117 Adjust Pin Current 10mA IOUT 1A, Change HPL1117 1.4V(VIN -VOUT) 10.75V (Note3) Minimum Load (VIN -VOUT)=10.75V Current HPL1117 Ripple Rejection fRIPPLE=120Hz, VRIPPLE=1VP-P, (VIN -VOUT)=3V Thermal Regulation TJ=25C, 30ms Pulse Temperature Stability Long -Term Stability TJ =125C,1000Hrs. RMS Output Noise TJ=25C,10HzF10kHz, (% of VOUT)
0.02
%/W % % % C/ W C
Thermal Resistance Junction to Case, at Tab Junction to Ambient Over Temperature Point Quiescent Current HPL1117-18 VIN9V HPL1117-25 VIN9V HPL1117-28 VIN9V HPL1117-33 VIN12V HPL1117-50 V 12V IN
5.5 5.5 5.5 5.5 5.5
10 10 10 10 10
mA
Note 1 : See thermal regulation specifications for changes in output voltage due to heating effects. Load line regulations are measured at a constant junction temperature by low duty cycle pulse testing. Note 2 : Dropout voltage is specified over the full output current range of the device. Dropout voltage is defined as the minimum input/output differential measured at the specified output current. Test points and limits are also shown on the Dropout Voltage curve. Note 3 : Minimum load current is defined as the minimum output current required to maintain regulation.
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Block Diagram
VIN VOUT
Current Lim it
Therm al Protection
Voltage Regulation
ADJ/GND
Application Circuits
1.25V to 10.7V Adjustable Regulator Improving Ripple Rejection
VIN
IN
HPL1117 OUT ADJ
VOUT1 R1 121 100 F C2
VIN 10F +
HPL1117 IN OUT ADJ R2 365 1%
+
10 F C1*
+ R2 1k
R1 121 1% + C1 10F
VOUT 150F
* Needed if device is far from filter capacitors
* C1 improves ripple rejection. XC should be approximately equal to R1 at ripple frequency
VOUT = 1.250V X
R1 + R2 R1
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Typical Characteristics
Load Transietn Response
5 4.5 4 0.01
5
HPL1117-33
Line Transient Response
0.02
6
HPL1117-33
0.15
Output Current (A)
3.5 3 2.5 2 1.5 1 0.5 0 -100 100 300 500 700 -0.03 900
CIN=10F COUT=10F Tantalum VIN=5V
Input Voltage (V)
0.1 4 3 2 0 1 0 -20 30 80 130 -0.05 180
0
CIN=10F COUT=10F Tantalum IOUT=0.1A
0.05
-0.01
-0.02
Time (S)
Time (S)
Dropout Voltage vs. Output Current
1.25 1.2
HPL1117-33
Output Voltage vs. Input Voltage
6 5
Dropout Voltage (V)
1.15 1.1 1.05 1 0.95 0.9 0 0.2 0.4 0.6 0.8 1
Output Voltage (V)
4 3 2 1 0 0 1 2 3 4 5 6 7 8 9
.
Output Current (A)
Input Voltage (V)
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Typical Characteristics Cont.
Input Current vs. Input Voltage
6
HPL1117-33
Current Limit vs. Input Voltage
2.4 2.2
HPL1117-33
5
Input Current (mA)
4
Current Limit (A)
0 2 4 6 8 10 12
2 1.8 1.6 1.4 1.2 1 5 7 9 11 13
3
2
1
0
Input Voltage (V)
Input Voltage (V)
Output Voltage vs. Temperature
2.6 2.5
3.3 3.4
Output Voltage vs. Temperature
2.4
Output Voltage (V)
Output Voltage (V)
-25 0 25 50 75 100 125
2.3 2.2 2.1 2 1.9 1.8 1.7 1.6 -50
3.2
3.1
3
2.9
2.8
2.7 -50
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Typical Characteristics Cont.
Output Voltage vs. Temperature
5.3 5.2
8 7
Input Current vs. Tmeperature
HPL1117-33
Output Voltage (V)
Input Current (mA)
5.1 5 4.9 4.8 4.7 -50
6 5 4 3 2 -50
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature (C)
Temperature (C)
Current Limit vs. Temperature
1.9 1.8 1.7
HPL1117-33
PSRR vs. Frequency
HPL1117-33
+0 Cadj=22F -10 IOUT=0.1A Vripple=1Vp-p -20
VIN-VOUT=5V
Current Limit (A)
1.6
-30
PSRR (dB)
-40 -50 -60 -70 -80 -90
VIN-VOUT>=3V VIN-VOUT>=Vdropout
1.5 1.4 1.3 1.2 1.1 1 -50 0 50 100 150
-100 10 20
50 100 200 500 1k 2k
5k 10k 20k 50k 200k
Temperature (C)
Frequency (Hz)
Copyright HIPAC Semiconductor, Inc. 6 Rev. B.13 - Mar., 2004
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HPL1117
Typical Characteristics Cont.
Adjustable Pin Current vs. Temperature
70
HPL1117-Adj
Adjustable Pin Current (A)
68 66 64 62 60 58 56 54 52 50 -50 -25 0 25 50 75 100 125
Temperature (C)
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Application Information
Output Voltage
The HPL1117 develops a 1.25V reference voltage between the output and the adjust terminal. By placing a resistor between these two terminals, a constant Current is caused to flow through R1 and down through R2 to set the overall output voltage. Normally this current is chosen to be the specified minimum load current of 10mA. For fixed voltage devices R1 and R2 are included in the device.
HPL1117 IN OUT ADJ
IADJ 60A
R2 VOUT = VREF(1+ )+IADJR2 R1
CONNECT R2 TO LOAD
VIN
HPL1117 IN OUT ADJ
Rp PARASITIC LINE RESISTANCE
R1
CONNECT R1 TO CASE
RL
R2
VIN
VOUT
Figure 2. Connections for Best Load Regulation
VREF
R1
Input Capacitor
A n i n p u t c a p a c i t o r o f 1 0 F o r g r e a t e r i s recommended. Tantalum, or aluminum electrolytic capacitors can be used for bypassing. Larger Val-
R2
Figure 1. Basic Adjustable Regulator
ues will improve ripple rejection by bypassing the input to the regulator.
Load Regulation
When the adjustable regulator is used. Load regulation will be limited by the resistance of the wire connecting the regulator to the load. The data sheet specification for load regulation is measured at the output pin of the device. Best load regulation is obtained when the top of the resistor divider (R1) is tied directly to the output pin of the device, not to the load. For fixed voltage devices the top of R1 is internally connected to the output, and the ground pin can be connected to low side of the load. If R1 were connected to the load, RP is multiplied by the divider ratio, the effective resistance between the regulator and the load would be:
Rp X (1+ R2 ), Rp = Parasitic Line Resistance R1
10
Output Capacitor
The HPL1117 requires an output capacitor to maintain stability and improve transient response. Proper capacitor selection is important to ensure proper operation. The HPL1117 output capacitor selection is dependent upon the ESR (equivalent series resistance) of the output capacitor to maintain stability. When the output capacitor is 10uF or greater, the output capacitor should have an ESR less than 1.This will improve transient response as well as promote stability. A lowESR solid tantalum capacitor works extremely well and provides good transient response and stability over temperature.
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Application Information (Cont.)
Output Capacitor (Cont.)
Aluminum electrolytics can also be used, as long as the ESR of the capacitor is <1. The value of the output capacitor can be increased without limit. Higher capacitance values help to improve transient response and ripple rejection and reduce output noise. Figure 3&4 shows for the TO-252 and SOT-223 the measured values of (J-A) for different copper area sizes using a 2 layers, 1.6mm, and 6Sq. cm FR-4 PCB with 2oz. copper and a ground plane layer on the backside area used for heatsinking. It can be used as a rough guideline in estimating thermal resistance.
50
Ripple Rejection
The curves for Ripple Rejection were generated using an adjustable device with the adjust pin bypassed. With a 22F bypassing capacitor 75dB ripple rejection is obtainable at any output level. The impedance of the adjust pin capacitor, at the ripple frequency, should be < R1. R1 is normally in the range of 100200. The size of the required adjust pin capacitor is a function of the input ripple frequency. At 120Hz, with R1=100, the adjust pin capacitor should be 13F. For fixed voltage devices, and adjustable devices without an adjust pin capacitor, the output ripple will increase as the ratio of the output voltage to the reference voltage (VOUT /VREF ).
Thermal Resistance (Juntion to Ambient) (C/W)
TA=25C
45
40
35
30
25 0 2 4 6 8 10 12 14
Top Copper Area (cm2) Figure 3.
(J-A) vs. copper area for the TO-252 package
Thermal Considerations
HPL1117 has thermal protection which limits junction temperature to 150C. However, device functionality is only guaranteed to a maximum junction temperature of +125C. Both the TO-220, TO-252, TO-263 and SOT-223 packages use a copper plane on the PCB and the PCB itself as a heatsink. To optimize the heat sinking ability of the plane and PCB, solder the tab of the package to the plane.
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004 11 www.hipacsemi.com
HPL1117
Application Information (Cont.)
Thermal Considerations (Cont.)
60
Thermal Resistance (Juntion to Ambient) (C/W)
TA=25C
55
50
45
40
35
30 0 2 4 6 8 10 12 14
Top Copper Area (cm2) Figure 4.
(J-A) vs. copper area for the SOT-223 package
The thermal resistance for each application will be affected by thermal interactions with other components on the board. Some experimentation will be necessary to determine the actual value. The power dissipation of HPL1117 is equal to : PD = (VIN - VOUT) x IOUT Maximum junction temperature is equal to : TJUNCTION = TAMBIENT + (PD x JA) Note: TJUNCTION must not exceed 125C
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Package Information
TO-220 ( Reference JEDEC Registration TO-220)
D Q
R
b E
e b1 e1
L1
H1
L
A F
c
J1
Millimeters Dim A b1 b c D e e1 E F H1 J1 L L1 R Q Min. 3.56 1.14 0.51 0.31 14.23 2.29 4.83 9.65 0.51 5.84 2.03 12.7 3.65 3.53 2.54 Max. 4.83 1.78 1.14 1.14 16.51 2.79 5.33 10.67 1.40 6.86 2.92 14.73 6.35 4.09 3.43 Min. 0.140 0.045 0.020 0.012 0.560 0.090 0.190 0.380 0.020 0.230 0.080 0.500 0.143 0.139 0.100
Inches Max. 0.190 0.070 0.045 0.045 0.650 0.110 0.210 0.420 0.055 0.270 0.115 0.580 0.250 0.161 0.135
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Package Informaion
TO-252( Reference JEDEC Registration TO-252)
E b2 L2 A C1
D H
L1 L b e1 D1 C A1
E1
Dim A A1 b b2 C C1 D D1 E E1 e1 H L L1 L2
M illim et er s M in. 2. 1 8 0. 8 9 0. 5 08 5. 2 07 0. 4 6 0. 4 6 5. 3 34 5. 2 R EF 6. 3 5 5. 3 R EF 3. 9 6 9. 3 98 0. 5 1 0. 6 4 0. 8 9 1. 02 2. 0 32
14
Inc he s M ax. 2. 39 1. 27 0. 89 5. 4 61 0. 58 0. 58 6. 22 6. 73 5. 18 10 . 41 M in. 0. 0 86 0. 0 35 0. 0 20 0. 2 05 0. 0 18 0. 0 18 0. 2 10 0. 2 05 R EF 0. 2 50 0. 2 09 R EF 0. 1 56 0. 3 70 0. 0 20 0. 0 25 0. 0 35 0. 0 40 0. 0 80
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M ax. 0. 0 94 0. 0 50 0. 0 35 0. 2 15 0. 0 23 0. 0 23 0. 2 45 0. 2 65 0. 2 04 0. 4 10
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
HPL1117
Package Information
TO-263 ( Reference JEDEC Registration TO-263)
E L2 E1 TE RM INA L 4
D L L3
D1
e e1 A c2
b2 b
1
R
L4
L1 DE TA IL "A "RO TE D
c
Millimeters Dim A b b2 c c2 D e e1 L L1 L2 L3 Min. 4.06 0.51 1.14 0.38 TYP. 1.14 8.64 9.65 2.54 TYP 14.60 2.24 1.02 1.20 15.88 2.84 2.92 1.78 0.575 0.090 0.040 0.050 1.40 9.65 10.54 0.045 0.340 0.380 Max. 4.83 1.016 1.651 Min. 0.160 0.02 0.045
Inches Max. 0.190 0.040 0.065 0.015 TYP. 0.055 0.380 0.415 0.100 TYP 0.625 0.110 0.112 0.070
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Package Information
SOT-223( Reference JEDEC Registration SOT-223)
D B1 A c a
H
E L K e e1 b A1
B
Dim A A1 B B1 c D E e e1 H L K Min. 1.50 0.02 0.60 2.90 0.28 6.30 3.30
Millimeters Max. 1.80 0.08 0.80 3.10 0.32 6.70 3.70 2.3 BSC 4.6 BSC 6.70 0.91 1.50 0 13 7.30 1.10 2.00 10 0.26 0.04 0.06 0 Min. 0.06 0.02 0.11 0.01 0.25 0.13
Inches Max. 0.07 0.03 0.12 0.01 0.26 0.15 0.09 BSC 0.18 BSC 0.29 0.04 0.08 10 13
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HPL1117
Physical Specifications
Terminal Material Lead Solderability Packaging Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3. 2500 devices per reel
(IR/Convection or VPR Reflow)
tp Critical Zone T L to T P
Reflow Condition
TP
Ram p-up
Tem perature
TL Tsm ax
tL
Tsm in Ram p-down ts Preheat
25
t 25 C to Peak
Classificatin Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Mix (Tsmax) - Time (min to max)(ts) Tsmax to TL - Temperature(TL) - Time (tL) Peak Temperature(Tp)
Tim e
Pb-Free Assembly Large Body Small Body 3C/second max. 150C 200C 60-180 seconds 3C/second max
Sn-Pb Eutectic Assembly Large Body Small Body 3C/second max. 100C 150C 60-120 seconds
183C 60-150 seconds
217C 60-150 seconds
Time within 5C of actual Peak 225 +0/-5C 240 +0/-5C 245 +0/-5C 250 +0/-5C Temperature(tp) Ramp-down Rate 10-30 seconds 10-30 seconds 10-30 seconds 20-40 seconds Time 25C to Peak Temperature 6C/second max. 6C/second max. 6 minutes max. 8 minutes max. Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004 17 www.hipacsemi.com
HPL1117
Package Reflow Conditions
pkg. thickness 2.5mm and all bgas Convection 220 +5/-0C VPR 215-219C IR/Convection 220 +5/-0C pkg. thickness < 2.5mm 3 and pkg. volume 350mm pkg. thickness < 2.5mm and pkg. 3 volume < 350mm Convection 235 +5/-0C VPR 235 +5/-0C IR/Convection 235 +5/-0C
Reliability test program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B, A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C , 5 SEC 1000 Hrs Bias @ 125 C 168 Hrs, 100 % RH , 121C -65C ~ 150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms , Itr > 100mA
Carrier Tape & Reel Dimension
t E Po P P1 D
F W
Bo
Ao
D1
T2
Ko
J C A B
T1
Copyright HIPAC Semiconductor, Inc. Rev. B.13 - Mar., 2004
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HPL1117
Carrier Tape & Reel Dimension
A p p li c a t io n A 330 3 T O -2 5 2 F 7 .5 0 .1 A p p li c a t io n A 3803 T O -2 6 3 F 11 . 5 0 . 1 A p p li c a t io n A 3301 S O T -2 2 3 F 5 .5 0 .0 5 B 100 2 D 1 .5 + 0 . 1 B 80 2 D 1 .5 + 0 . 1 B 6 2 1 .5 D 1 .5 + 0 . 1 C 13 0. 5 D1 1 . 5 0 .2 5 C 13 0. 5 D1 1 . 5 0 .2 5 C 1 2 .7 5 0 .1 5 D1 1 .5 + 0 . 1 J 2 0 .5 Po 4 .0 0 .1 J 2 0 .5 Po 4 .0 0 .1 J 2 0 .6 Po T1 1 6 .4 + 0 . 3 - 0 .2 P1 2 .0 0 .1 T1 24 4 P1 T2 2 .5 0 .5 Ao 6 .8 0 .1 T2 2 0 .3 Ao W 1 6 + 0 .3 - 0 .1 Bo 1 0 .4 0 .1 W 2 4 + 0 .3 - 0 .1 Bo P 8 0 .1 Ko 2 . 5 0 .1 P 1 6 0 .1 Ko E 1 .7 5 0 .1 t 0 .3 0 .0 5 E 1 .7 5 0 .1 t
2 .0 0 .1 1 0 . 8 0 . 1 1 6 .1 0 .1 T1 1 2 .4 + 0 .2 P1 T2 2 0 .2 Ao W 1 2 0 .3 Bo 7 . 5 0 .1
5 . 2 0 .1 0 .3 5 0 .0 1 3 P 8 0 .1 Ko 2 . 1 0 .1 E 1 .7 5 0 .1 t 0 .3 0 .0 5
4 .0 0 .1 2 . 0 0 .0 5 6 .9 0 .1
Cover Tape Dimensions
Application TO- 252 TO- 263 SOT- 223 Carrier Width 16 24 12 Cover Tape Width 13.3 21.3 9.3 Devices Per Reel 2500 1000 2500
CONTACT
HIPAC Semiconductor, Inc. 2540 North First Street, Suite 308 San Jose, CA 95131-1016 U.S.A. Tel: 1-408-943-0808 Fax: 1-408-943-0878 E-Mail: info@hipacsemi.com
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